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chiranthsiddappa / caf_verilog
90%
master: 90%

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LAST BUILD BRANCH: prepend-keys
DEFAULT BRANCH: master
Repo Added 13 Nov 2018 02:50AM UTC
Files 30
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  • argmax
  • caf
  • capture_buffer
  • cpx-multiply
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  • dot-prod-pip
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  • prepend-keys
  • reference_buffer
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  • xcorr

pending completion
185

Pull #6

travis-ci-com

web-flow
Adding other modules that needed changing for arg max
Pull Request #6: Prepend keys

35 of 35 new or added lines in 7 files covered. (100.0%)

883 of 979 relevant lines covered (90.19%)

0.9 hits per line

Relevant lines Covered
Build:
Build:
979 RELEVANT LINES 883 COVERED LINES
0.9 HITS PER LINE
Source Files on master
  • List 0
  • Changed 25
  • Source Changed 14
  • Coverage Changed 25
Coverage ∆ File Lines Relevant Covered Missed Hits/Line

Recent builds

Builds Branch Commit Type Ran Committer Via Coverage
185 prepend-keys Adding other modules that needed changing for arg max Pull #6 11 Jul 2019 09:39PM UTC web-flow travis-ci-com pending completion  
184 prepend-keys Adding other modules that needed changing for arg max push 11 Jul 2019 09:38PM UTC Chiranth Siddappa travis-ci-com pending completion  
183 prepend-keys Moving file into test folder Pull #6 11 Jul 2019 07:37PM UTC web-flow travis-ci-com pending completion  
182 prepend-keys Moving file into test folder push 11 Jul 2019 07:33PM UTC Chiranth Siddappa travis-ci-com pending completion  
181 unconnected-fix Connecting unconnected wire; still unused push 10 Jul 2019 01:53PM UTC Chiranth Siddappa travis-ci-com pending completion  
180 master Adding notebooks into the toctree push 09 Jul 2019 01:39PM UTC Chiranth Siddappa travis-ci-com pending completion  
179 docs Adding changes for notebook from paper writing push 08 Jul 2019 10:22PM UTC Chiranth Siddappa travis-ci-com pending completion  
178 master Renaiming the xcorr output and using subplot for zoomed in image push 08 Jul 2019 07:20PM UTC Chiranth Siddappa travis-ci-com pending completion  
177 docs Renaiming the xcorr output and using subplot for zoomed in image push 17 Jun 2019 05:47AM UTC Chiranth Siddappa travis-ci-com pending completion  
176 docs Merge branch 'docs' of github.com:chiranthsiddappa/caf_verilog into docs push 10 Jun 2019 06:18PM UTC Chiranth Siddappa travis-ci-com pending completion  
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