chiranthsiddappa
/
caf_verilog
80%
master: 90%
master: 90%
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Repo Added
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LAST BUILD ON BRANCH freq_shift
push
travis-ci-com
Chiranth Siddappa
491 of 613 relevant lines covered (80.1%)
1.6 hits per line
Relevant lines Covered
613
RELEVANT LINES
491
COVERED LINES
1.6
HITS PER LINE
Source Files on freq_shift
| Coverage | ∆ | File | Lines | Relevant | Covered | Missed | Hits/Line |
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Recent builds
| Builds | Branch | Commit | Type | Ran | Committer | Via | Coverage |
|---|---|---|---|---|---|---|---|
| 123 | freq_shift | Adding frequency shift modules to manifest | push | Chiranth Siddappa | travis-ci-com | pending completion | |
| 122 | freq_shift | Adding output files for the notebooks | push | Chiranth Siddappa | travis-ci-com | pending completion | |
| 121 | freq_shift | Able to write out testbench | push | Chiranth Siddappa | travis-ci-com | pending completion |