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leonardt / silica
69%
master: 74%

Build:
Build:
LAST BUILD BRANCH: jtag2
DEFAULT BRANCH: master
Repo Added 03 Oct 2018 09:08PM UTC
Files 36
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LAST BUILD ON BRANCH optimize
branch: optimize
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  • optimize
  • SSA
  • ac_channel
  • channel-macros
  • desugar
  • fun-sig-master
  • function
  • jtag2
  • master
  • new-ssa
  • patch-ssa
  • path-based-synthesis
  • tap
  • tap_verilog
  • uart-shift
  • verilog-backend
  • verilog_fix
  • wire-syntax
  • xmodem

pending completion
269

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travis-ci

leonardt
Fix tff evaluation

1525 of 2198 relevant lines covered (69.38%)

0.69 hits per line

Relevant lines Covered
Build:
Build:
2198 RELEVANT LINES 1525 COVERED LINES
0.69 HITS PER LINE
Source Files on optimize
Detailed source file information is not available for this build.

Recent builds

Builds Branch Commit Type Ran Committer Via Coverage
269 optimize Fix tff evaluation push 19 Oct 2018 02:37AM UTC leonardt travis-ci pending completion  
268 optimize Remove code duplication in verilog detect push 19 Oct 2018 02:28AM UTC leonardt travis-ci pending completion  
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