leonardt / silica / 469

Builds Branch Commit Type Ran Committer Via Coverage
469 master Rework reset logic synthesis push leonardt travis-ci pending completion   set done
468 master Update fault req push leonardt travis-ci pending completion   set done
465 master Add reset logic and jtag push leonardt travis-ci pending completion   set done
464 master Add note about synchronous reset push leonardt travis-ci pending completion   set done
463 master SDRAM passes test! push leonardt travis-ci pending completion   set done
462 master Init reg logic push leonardt travis-ci pending completion   set done
461 master Test cmd and fix output bug push leonardt travis-ci pending completion   set done
460 master Basic sdram test push leonardt travis-ci pending completion   set done
459 master Use ifelse pattern push leonardt travis-ci pending completion   set done
458 master Fix cfg bug push leonardt travis-ci pending completion   set done
457 master Fix missing package push leonardt travis-ci pending completion   set done
455 master Remove autogenerated file push leonardt travis-ci pending completion   set done
454 master WIP SDRAM push leonardt travis-ci pending completion   set done
453 master Add versions used push leonardt travis-ci pending completion   set done
452 master Add chisel jtag push leonardt travis-ci pending completion   set done