leonardt / verilogAST-cpp

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• slice-index
• 0.0.1
• 0.0.10
• 0.0.11
• 0.0.12
• 0.0.13
• 0.0.14
• 0.0.15
• 0.0.16
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• 0.0.18
• 0.0.2
• 0.0.20
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• 0.0.23
• 0.0.3
• 0.0.4
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• 0.0.9
• add-concat-coalescer-transformer
• add-full-install
• add-zext-coalescer-transformer
• always
• always-codegen-size
• attribute
• blacklist-module-instance
• blacklist-slice-inline
• cast-operator
• comment
• comment-contents
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• const-expr
• copy-constructors
• default-num-tostr
• default-radix
• disable-escape
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• expr-comment
• fix-corier-853
• fix-inline-logic-multiple-assign
• fix-inline-slice-logic
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• if
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• inline-index-then-slice
• inline-slice-id
• inline-verilog-node
• inline-verilog-symbol-map
• inline-wire-blacklist
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• master
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• nd-vector
• nested-index
• order-ports
• parameterized-test
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• prevent-inline-into-module-instance
• prevent-inlining-num-literal
• radix-constructor
• replicate
• simplify-regex
• slice-expr
• string
• transform-inline-verilog
• transformer
• unique-ptr
• v0.0.19
• vector-decl
• vector-param

Build # 476

Build Type

Pull #47

travis-ci-com

Committed by web-flow

Commit Message

Merge 0252593d0 into 276489bc1

Pull Request Pull Request #47: Support slice and attribute for value of index

Run Details

28 of 28 new or added lines in 6 files covered. (100.0%)

940 of 947 relevant lines covered (99.26%)

97.35 hits per line