leonardt / verilogAST-cpp

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• add-concat-coalescer-transformer
• add-full-install
• add-zext-coalescer-transformer
• always
• always-codegen-size
• attribute
• blacklist-module-instance
• blacklist-slice-inline
• cast-operator
• comment
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• const-expr
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• default-num-tostr
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• disable-escape
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• expr-comment
• fix-corier-853
• fix-inline-logic-multiple-assign
• fix-inline-slice-logic
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• inline-index-then-slice
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• inline-verilog-node
• inline-verilog-symbol-map
• inline-wire-blacklist
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• master
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• prevent-inline-into-module-instance
• prevent-inlining-num-literal
• radix-constructor
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• simplify-regex
• slice-expr
• slice-index
• string
• transform-inline-verilog
• transformer
• unique-ptr
• v0.0.19
• vector-decl
• vector-param

Build # 369

Build Type

Pull #36

travis-ci-com

Committed by web-flow

Commit Message

[assign inliner] handle case when input assigned to output

Pull Request Pull Request #36: [assign inliner] handle case when input assigned to output

Run Details

10 of 10 new or added lines in 2 files covered. (100.0%)

857 of 862 relevant lines covered (99.42%)

76.19 hits per line