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• add-concat-coalescer-transformer
• add-full-install
• add-zext-coalescer-transformer
• always
• attribute
• blacklist-module-instance
• blacklist-slice-inline
• cast-operator
• comment
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• default-num-tostr
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• fix-inline-slice-logic
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• hotfix-assign-inliner
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• inline-verilog-node
• inline-verilog-symbol-map
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• linebreaks
• logical-binops
• master
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• nd-vector
• nested-index
• order-ports
• parameterized-test
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• prevent-inline-into-module-instance
• prevent-inlining-num-literal
• radix-constructor
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• simplify-regex
• slice-expr
• slice-index
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• transform-inline-verilog
• transformer
• unique-ptr
• v0.0.19
• vector-decl
• vector-param

Build # 471

Build Type

Pull #45

travis-ci-com

Committed by web-flow

Commit Message

Merge 3f07f9c1a into 3fd084c4e

Pull Request Pull Request #45: Always codegen size

Run Details

14 of 14 new or added lines in 2 files covered. (100.0%)

932 of 935 relevant lines covered (99.68%)

97.5 hits per line