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Build # 25974450342

Build Type

push

github

Committed by kaidokert

Commit Message

Report: COMP IRQ unmask leak — latent since the port, exposed by NVIC fix

Standalone report for the porting agent and future audit.

rm32 leaves EXTI.IMR1[22] (COMP2 interrupt-enable) unmasked anytime
the motor is Armed, Disarmed, or transitioning through stop paths
(stuck rotor, desync, signal_timeout). AM32 explicitly calls
maskPhaseInterrupts() at every stop/timeout site — ~15 sites in
main.c. rm32 only masks on the LVC / IsrAction::AllOff path.

Latent while NVIC priorities were misconfigured (all collapsed to
level 0 due to a separate cortex-m-vs-CMSIS shift bug), because
Cortex-M same-priority IRQs tail-chain and don't preempt — so
comparator noise on undriven BEMF pins couldn't starve TIM6.

Surfaces immediately once NVIC priorities are honored (COMP=0
preempting TIM6=3): comparator output bouncing on noise storms
COMP_IRQ, freezes firmware in seconds. dbg_isr_tick stops advancing
at ~13 s uptime on the L431 bench.

Same latent bug exists in G071/F051/G431 COMP ISR wrappers. When
porting the NVIC priority fix to those targets, the COMP mask must
be applied at the same time — they are a single unit.

Report covers: evidence in AM32 (the 15 call sites) and rm32 (the
4 stop paths and which one masks), hardware observation at the
freeze, the fix applied to mcu_l431/interrupts.rs, three reasons
testing missed it (no hardware fault injection, no typestate, NVIC
bug hid the symptom), three recommended improvements (mask-on-stop
HAL invariant test, typestate refactor, hardware fault-injection
in harness).

Coverage Stats

4143 of 6439 relevant lines covered (64.34%)

911.08 hits per line