nickg / nvc
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master: 93%

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coverage: 92.558% (+0.002%) from 92.556%
18553251982

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nickg 
Fix incorrect string concatenation simplification

2 of 2 new or added lines in 1 file covered. (100.0%)

20 existing lines in 2 files now uncovered.

74528 of 80520 relevant lines covered (92.56%)

446487.66 hits per line

Relevant lines Covered
80520 RELEVANT LINES 74528 COVERED LINES
446487.66 HITS PER LINE
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Recent builds

Builds Branch Commit Type Ran Committer Via Coverage
18553251982 test Fix incorrect string concatenation simplification push nickg github
92.56
18475654093 test Parse string variable declarations in modules push nickg github
92.56
18427927468 test Better handling of System Verilog nulls push nickg github
92.55
18400004699 test Remove the precompile elaboration mode push nickg github
92.55
18388615387 test Allow separate data type declaration for task/function ports push nickg github
92.77
18357857701 test Fix handling of records in lower_constrain_port push nickg github
92.77
18325916823 test Handle record element constraints in get_subtype_for push nickg github
92.78
18260387429 test System function $clog2 is constant push nickg github
92.77
18260050994 test System function $clog2 is constant push nickg github
92.77
18248879785 test Improve type checking for Verilog binary operators push nickg github
92.74
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