nickg / nvc / 25731929106

Builds Branch Commit Type Ran Committer Via Coverage
25731929106 issue-1535 Merge fdb628c77 into ed1457c15 Pull #1536 web-flow github
92.27
25658034088 master Arm triggers at creation time push nickg github
92.27
25657201782 test Arm triggers at creation time push nickg github
92.27
25656559714 master Add missing "END_TEST" back to three test cases (#1533) push web-flow github
92.26
25633697119 master Handle wide vectors in vpi_get_value push nickg github
92.26
25633349158 test Handle wide vectors in vpi_get_value push nickg github
92.26
25575604241 master Fix net/variable mix-up in mixed language elaboration Fixes #1519 push nickg github
92.25
25574844042 test Fix net/variable mix-up in mixed language elaboration push nickg github
92.25
25521805087 master Constant folding for Verilog << and >>> push nickg github
92.26
25520612010 test Constant folding for Verilog << and >>> push nickg github
92.26
25518923451 master Fix swapped behavior of SRA/SLA (#1530) push web-flow github
92.25
25517027683 issue-1529 Merge 78c5a0017 into a489d7f0d Pull #1530 web-flow github
92.25
25482071318 master Fix more cases with mixed vector/real operations push nickg github
92.25
25481241138 test Fix more cases with mixed vector/real operations push nickg github
92.25
25401473934 master Fix empty MIR block when UDP row matches all input push nickg github
92.23