nickg / nvc / 8766387031
93%
master: 93%

LAST BUILD BRANCH: random-initialization
DEFAULT BRANCH: master
Ran
Jobs 1
Files 79
Run time 1min
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst
coverage: 91.638% (+0.04%) from 91.603%
8766387031

push

github

nickg 
Lowering for delays in Verilog procedural assignments

88 of 92 new or added lines in 3 files covered. (95.65%)

394 existing lines in 14 files now uncovered.

53471 of 58350 relevant lines covered (91.64%)

654662.69 hits per line

Jobs
ID Job ID Ran Files Coverage
1 8766387031.1 0
91.64
 GitHub Action Run
Source Files on build 8766387031
Detailed source file information is not available for this build.