SystemRDL / PeakRDL-regblock / 5971630983

Builds Branch Commit Type Ran Committer Via Coverage
5971630983 v0.18.0 Add parameters for data and addr width to package output push amykyta3 github
93.64
5971619893 main Add parameters for data and addr width to package output push amykyta3 github
93.64
5971583024 main Discard LSbs of address for AXI4-Lite CPUIF to properly handle unaligned transfers. #60 push amykyta3 github
93.64
5758921888 main Doc updates push amykyta3 github pending completion   set done
5758723343 main More test coverage push amykyta3 github pending completion   set done
5746977704 main Coverage improvements push amykyta3 github pending completion   set done
5746671819 main Omit unecessary hwif signals if an external register is read-only or write-only. #58 push amykyta3 github pending completion   set done
5734475782 main Add assertion for rogue external ack strobes. Clarify recommended external ack tieoff. #57 push amykyta3 github pending completion   set done
5606788656 v0.17.0 Add changelog push amykyta3 github pending completion   set done
5606781812 main Add changelog push amykyta3 github pending completion   set done
5606734994 main version push amykyta3 github pending completion   set done
5606674879 main Clean up ugly unconditional 'if(1)' conditionals in field logic. #50 push amykyta3 github pending completion   set done
5606514988 main Make remaining interrupt conditional predicates single-bit. #54 push amykyta3 github pending completion   set done
5595133736 main Make stickybit conditional predicate a single-bit result rather than a vector. #54 push amykyta3 github pending completion   set done
5408820320 v0.16.0 version push amykyta3 github pending completion   set done