SystemRDL / PeakRDL-regblock / 5606788656

Builds Branch Commit Type Ran Committer Via Coverage
5606788656 v0.17.0 Add changelog push amykyta3 github pending completion   set done
5606781812 main Add changelog push amykyta3 github pending completion   set done
5606734994 main version push amykyta3 github pending completion   set done
5606674879 main Clean up ugly unconditional 'if(1)' conditionals in field logic. #50 push amykyta3 github pending completion   set done
5606514988 main Make remaining interrupt conditional predicates single-bit. #54 push amykyta3 github pending completion   set done
5595133736 main Make stickybit conditional predicate a single-bit result rather than a vector. #54 push amykyta3 github pending completion   set done
5408820320 v0.16.0 version push amykyta3 github pending completion   set done
5408812801 main version push amykyta3 github pending completion   set done
5408789517 main Fix edge case if exporting a block that contains no internal registers. #53 push amykyta3 github pending completion   set done
5274955546 main Use sized integer literals in comparisons. #49 push amykyta3 github pending completion   set done
5251484512 main Fix oversized address width calculation edge case. #46 push amykyta3 github pending completion   set done
5218750189 v0.15.0 version push amykyta3 github pending completion   set done
5218745889 main version push amykyta3 github pending completion   set done
5218739785 main Use sized integer literals if bit width exceeds 32-bits. #43 push amykyta3 github pending completion   set done
5009920542 v0.14.0 version push Alex Mykyta github pending completion   set done