SystemRDL / PeakRDL-regblock / 6649619308

Builds Branch Commit Type Ran Committer Via Coverage
6649619308 main Add validation check for write buffered registers that trigger off of their own field. #39 push amykyta3 github
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6636421409 main Migrate to pyproject.toml push amykyta3 github
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6636389767 dev/pyproject Migrate to pyproject.toml push amykyta3 github
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6636301255 main Implement new SVInt object to defer literal expansion and allow bit-fiddling operations. Fix invalid bit-slicing of literals if field reset value is a constant. #71 push amykyta3 github
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6608483264 main Simulator compatibility updates push amykyta3 github
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6608457199 dev/rework-simulators Simulator compatibility updates push amykyta3 github
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6491491866 v0.19.0 Update version push amykyta3 github
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6491475157 main Update version push amykyta3 github
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6491428782 main Fix hwif type name generation to properly handle parameterized component names. #70 push amykyta3 github
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6351883504 main fix typo push amykyta3 github
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6347885451 main docs yaml push amykyta3 github
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6347116431 main Fix axi4-lite write strobe width. #68 push amykyta3 github
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6118548046 main Fix always_ff generation for non-reset fields and async default reset. #63 push amykyta3 github
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6118389736 main Fix xsim compatibility quirk push amykyta3 github
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6118165572 main Remove implication operator to avoid xsim compatibility limitation. #57 push amykyta3 github
93.64