SystemRDL / PeakRDL-regblock / 8224068139

Builds Branch Commit Type Ran Committer Via Coverage
8224068139 main fix: a typo in SV template push amykyta3 github
93.57
8222772486 fix_typo Merge e1e3ea50e into 0d39774d2 Pull #86 web-flow github
93.65
7429654116 v0.20.0 Fixup whitespace push amykyta3 github
93.65
7429629515 main Fixup whitespace push amykyta3 github
93.57
7408413937 cpuif_parameters Merge f58d1e9a7 into 6433cd1fc Pull #80 web-flow github
93.66
6793942920 main Fix typo in pyproject keywords push amykyta3 github
93.57
6681214489 main Update to use trusted deploy push amykyta3 github
93.69
6649619308 main Add validation check for write buffered registers that trigger off of their own field. #39 push amykyta3 github
93.69
6636421409 main Migrate to pyproject.toml push amykyta3 github
93.73
6636389767 dev/pyproject Migrate to pyproject.toml push amykyta3 github
93.73
6636301255 main Implement new SVInt object to defer literal expansion and allow bit-fiddling operations. Fix invalid bit-slicing of literals if field reset value is a constant. #71 push amykyta3 github
93.73
6608483264 main Simulator compatibility updates push amykyta3 github
93.71
6608457199 dev/rework-simulators Simulator compatibility updates push amykyta3 github
93.71
6491491866 v0.19.0 Update version push amykyta3 github
93.71
6491475157 main Update version push amykyta3 github
93.71