nickg / nvc / 8123560494

Builds Branch Commit Type Ran Committer Via Coverage
8123560494 master Fix crash when view element indication references whole record Fixes #854 push nickg github
91.6
8122563891 test Fix crash when view element indication references whole record push nickg github
91.6
8122422136 test Deferred subprogram instantiation for packages. push nickg github
91.6
8086285986 master Missing static bounds checks for some index constraints push nickg github
91.6
8085989403 test Missing static bounds checks for some index constraints push nickg github
91.6
8085844253 test Missing static bounds checks for some index constraints push nickg github
91.6
8069639215 master Look up signal bounds dynamically in FST dumper. Issue #851 push nickg github
91.6
8069498397 test Look up signal bounds dynamically in FST dumper push nickg github
91.6
8055619116 master Verilog number parsing and printing improvements push nickg github
91.61
8055409680 test Verilog number parsing and printing improvements push nickg github
91.6
8040255646 master Add some basic support for Verilog module instantiation push nickg github
91.66
8040191195 test Add some basic support for Verilog module instantiation push nickg github
91.66
8030271519 master Add support for Verilog supply net type. Issue #808 push nickg github
91.65
8030177309 test Add support for Verilog supply net type push nickg github
91.65
8030113021 test Add support for Verilog supply net type push nickg github
91.67