nickg / nvc / 17529851662

Builds Branch Commit Type Ran Committer Via Coverage
17529851662 test Fix constraint propagation from initial value push nickg github
92.62
17528373319 master Improve handling of escape sequences in Verilog strings push nickg github
92.61
17528370237 master Fix coverage off pragma being ignored when surrounding generate scope. Fixes #1284 (#1288) push web-flow github
92.63
17528209299 fix-cover-pragma-around-generate Merge 044250045 into 526ac7f0f Pull #1288 web-flow github
92.63
17528137955 test Improve handling of escape sequences in Verilog strings push nickg github
92.61
17519108852 master Parse Verilog enable gates push nickg github
92.63
17518957290 test Parse Verilog enable gates push nickg github
92.63
17517359252 fix-cover-pragma-around-generate Merge a749a9d1b into 60f2d8bd0 Pull #1288 web-flow github
92.65
17517146210 master Basic code generation for System Verilog enums push nickg github
92.65
17516785922 test Basic code generation for System Verilog enums push nickg github
92.65
17514040227 master Handle more Verilog operator assignments push nickg github
92.66
17513768111 test Handle more Verilog operator assignments push nickg github
92.65
17513184960 master Handle concatenation in output port connection Issue #1286 push nickg github
92.64
17513059548 test Handle concatenation in output port connection push nickg github
92.64
17512424279 test Fix Verilog driver initialisation for arrays push nickg github
92.65