SystemRDL / PeakRDL-regblock-vhdl
93%
main: 93%

LAST BUILD BRANCH: v1.3.1.1+vhdl
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LAST BUILD ON BRANCH v1.3.1.1+vhdl
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coverage: 92.566%. Remained the same
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bump version to 1.3.1.1

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Recent builds

Builds Branch Commit Type Ran Committer Via Coverage
26036825990 v1.3.1.1+vhdl bump version to 1.3.1.1 push darsor github
92.57
26036478471 main bump version to 1.3.1.1 push darsor github
92.57
26035907390 main add ID_WIDTH generic to record OBI CPUIF (#46) push web-flow github
92.57
26003110390 dev/fix-obi-synth Merge 4a7491e51 into 1cd3cb63a Pull #46 web-flow github
92.57
26002626013 dev/fix-obi-synth add ID_WIDTH generic to record OBI CPUIF push darsor github
92.57
25993933635 dev/fix-obi-synth use VHDL regblock adapter as top-level for synth tests push darsor github
92.55
24892973766 main Added a package_library property to the cpuif base class, to allow custom cpu interfaces to import the definitions from package_name (e.g. records) from a user specified library. (#44) When this property is not overridden by a cpuif, it defaults ... push web-flow github
92.54
24853481696 feature/cpuif_pkg_lib Merge d0862d6b0 into 578c0e46e Pull #44 web-flow github
92.54
23994681527 v1.3.1.0+vhdl Merge upstream/v1.3.1 into VHDL port push darsor github
92.54
23994631018 main Merge upstream/v1.3.1 into VHDL port push darsor github
92.54
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