SystemRDL / PeakRDL-regblock-vhdl
93%

DEFAULT BRANCH: main
Repo Added
Files 48
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

LAST BUILD ON BRANCH main
branch: SELECT
CHANGE BRANCH
x

coverage: 92.542% (+0.005%) from 92.537%
Relevant lines Covered
3286 RELEVANT LINES 3095 COVERED LINES
6.59 HITS PER LINE
Source Files on main

Recent builds

Builds Branch Commit Type Ran Committer Via Coverage
24892973766 main Added a package_library property to the cpuif base class, to allow custom cpu interfaces to import the definitions from package_name (e.g. records) from a user specified library. (#44) When this property is not overridden by a cpuif, it defaults ... push web-flow github
92.54
24853481696 feature/cpuif_pkg_lib Merge d0862d6b0 into 578c0e46e Pull #44 web-flow github
92.54
23994681527 v1.3.1.0+vhdl Merge upstream/v1.3.1 into VHDL port push darsor github
92.54
23994631018 main Merge upstream/v1.3.1 into VHDL port push darsor github
92.54
23982324683 v1.3.0.0+vhdl remove old readback generator file push darsor github
92.54
23982201691 main remove old readback generator file push darsor github
92.54
23982037704 main Merge upstream/v1.3.0 into VHDL port push darsor github
85.61
23101840265 v1.2.0.1+vhdl bump version to 1.2.0.1 push darsor github
92.16
23101693077 main bump version to 1.2.0.1 push darsor github
92.15
22446006992 main Add checklist item for opening an issue before PR push web-flow github
92.15
See All Builds (62)