StanfordAHA / garnet
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master: 98%

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LAST BUILD ON BRANCH simple_mapper
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Kuree 
Verilog pointers for Fault tests (#250)

* add verilog modules

* add verilog files for fault tests

* add verilog ptr to reset test

192 of 196 relevant lines covered (97.96%)

0.98 hits per line

Relevant lines Covered
196 RELEVANT LINES 192 COVERED LINES
0.98 HITS PER LINE
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Recent builds

Builds Branch Commit Type Ran Committer Via Coverage
2816 simple_mapper Verilog pointers for Fault tests (#250) * add verilog modules * add verilog files for fault tests * add verilog ptr to reset test push Kuree travis-ci-com pending completion  
2140 simple_mapper Verilog pointers for Fault tests (#250) * add verilog modules * add verilog files for fault tests * add verilog ptr to reset test push Kuree travis-ci pending completion  
2088 simple_mapper remove test files push Kuree travis-ci pending completion  
2756 simple_mapper remove test files push Kuree travis-ci-com pending completion  
2073 tapeout Fix syntax error push alexcarsello travis-ci pending completion  
2737 tapeout Fix syntax error push alexcarsello travis-ci-com pending completion  
2071 simple_mapper speed up the powerdomain pass using custom replacement algorithm push Kuree travis-ci pending completion  
2735 simple_mapper speed up the powerdomain pass using custom replacement algorithm push Kuree travis-ci-com pending completion  
2732 tapeout update design name in gen_route_bumps push alexcarsello travis-ci-com pending completion  
2068 tapeout update design name in gen_route_bumps push alexcarsello travis-ci pending completion  
See All Builds (2025)