StanfordAHA / garnet

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LAST BUILD ON BRANCH late-bind-peak-rtl

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• late-bind-peak-rtl
• rename-mem
• update-stub
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• refactor-regression-test
• directed-test-global-controller
• mem-functional-model
• top-python
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• memory-core-linebuffer-mode
• switch-box-directed-test-2
• add-deprecated-decorator
• update-run-verilog-sim
• improved_gc_tb
• gc_functional_model
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• analog_reg_removal_gc
• simple-cgra-v2
• update-bv-int-vector
• switch-box-functional-model
• update-config-register
• update-gold
• simple_pe
• add_IOs
• patch-cosa-install-intructions
• configurable-simple-pe
• hotfix-test_simple_pe-1
• wrap-pe
• fix-parsed-verilog-output
• fix_gc_coverage
• add_read_data
• simple-cgra
• init-py37
• patch-cb-regression
• add-type-maps
• simple-cgra-type_map-fix
• simple-cgra-mux-tests
• master-pin-cosa
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• simple-cgra-fix-pe-core
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• update-simple-cb-test
• add-config-enable
• test-tile
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• update-cosa
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• hotfix-coreir
• patch-install
• pypi-magma-mantle
• tapeout
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• mem_generator
• fix-gold
• global-signal-column
• nb_dev1
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• interconnect-abstractions
• fix_ncsim_err
• fix-mux-wrapper
• iopad
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• interconnect_config
• interconnect-v2
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• test-plan
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• leonardt-patch-1
• switch-canal
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• memory_core_impl
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• new_io
• pd-rtl
• simple_mapper
• pnr_info
• new_global_wiring
• io_core
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• fix-gc-op-select
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Build # 1668

Build Type

push

travis-ci

Committed by Kuree

Commit Message

fix typo

Run Details

189 of 193 relevant lines covered (97.93%)

0.98 hits per line