nickg / nvc / 21567935534
93%

DEFAULT BRANCH: master
Ran
Jobs 1
Files 102
Run time 1min
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst
coverage: 92.608% (-0.01%) from 92.618%
21567935534

push

github

nickg 
Proper handling of System Verilog import declarations

Fixes #1387

33 of 48 new or added lines in 3 files covered. (68.75%)

1 existing line in 1 file now uncovered.

76617 of 82733 relevant lines covered (92.61%)

440768.84 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
15
95.71
 -0.33% src/vlog/vlog-parse.c

Uncovered Existing Lines

Lines Coverage ∆ File
1
95.71
 -0.33% src/vlog/vlog-parse.c
Jobs
ID Job ID Ran Files Coverage
1 21567935534.1 102
92.61
 GitHub Action Run
Source Files on build 21567935534