nickg / nvc / 21564406133
93%

DEFAULT BRANCH: master
Ran
Jobs 1
Files 102
Run time 1min
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Rst
coverage: 92.618%. Remained the same
21564406133

push

github

nickg 
Enable cloning for Verilog instances

Issue #1379

94 of 97 new or added lines in 3 files covered. (96.91%)

126 existing lines in 1 file now uncovered.

76588 of 82692 relevant lines covered (92.62%)

436605.09 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
1
94.42
 -0.01% src/vlog/vlog-lower.c
2
90.95
 0.01% src/elab.c

Uncovered Existing Lines

Lines Coverage ∆ File
126
96.75
 0.0% src/parse.c
Jobs
ID Job ID Ran Files Coverage
1 21564406133.1 102
92.62
 GitHub Action Run
Source Files on build 21564406133