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nickg / nvc / 26395823927 / 1
92%
master: 92%

Build:
Build:
LAST BUILD BRANCH: test
DEFAULT BRANCH: master
Ran 25 May 2026 10:41AM UTC
Files 103
Run time 9s
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25 May 2026 10:27AM UTC coverage: 92.265% (-0.004%) from 92.269%
26395823927.1

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nickg
Improve checking for Verilog constant expressions

78777 of 85381 relevant lines covered (92.27%)

630338.01 hits per line

Source Files on job 26395823927.1
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  • List 103
  • Changed 10
  • Source Changed 0
  • Coverage Changed 10
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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