• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

nickg / nvc / 20777223686 / 1
93%
master: 93%

Build:
DEFAULT BRANCH: master
Ran 07 Jan 2026 09:54AM UTC
Files 101
Run time 4s
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

07 Jan 2026 09:44AM UTC coverage: 92.597% (+0.002%) from 92.595%
20777223686.1

push

github

nickg
Downgrade Verilog unconnected port diagnostic to a warning

Fixes #1333

75996 of 82072 relevant lines covered (92.6%)

474408.69 hits per line

Source Files on job 20777223686.1
  • Tree
  • List 101
  • Changed 2
  • Source Changed 0
  • Coverage Changed 2
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
  • Back to Build 20777223686
  • 4a23f27f on github
  • Prev Job for on master (#20742604169.1)
  • Next Job for on master (#20796089872.1)
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2026 Coveralls, Inc