nickg / nvc / 18632896339 / 1
93%
master: 93%

LAST BUILD BRANCH: random-initialization
DEFAULT BRANCH: master
Ran
Files 100
Run time 4s
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coverage: 92.581% (+0.001%) from 92.58%
18632896339.1

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nickg 
Constant fold Verilog binary and/or/xor

74754 of 80744 relevant lines covered (92.58%)

461084.85 hits per line

Source Files on job 18632896339.1