nickg / nvc / 17415665085 / 1
93%
master: 93%

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coverage: 92.625% (+0.001%) from 92.624%
17415665085.1

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nickg 
Handle Verilog `include directive in preprocessor

73035 of 78850 relevant lines covered (92.63%)

590087.71 hits per line

Source Files on job 17415665085.1