• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

nickg / nvc / 17025294111 / 1
93%
master: 93%

Build:
Build:
LAST BUILD BRANCH: test
DEFAULT BRANCH: master
Ran 17 Aug 2025 08:16PM UTC
Files 98
Run time 4s
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

17 Aug 2025 08:04PM UTC coverage: 92.571% (+0.007%) from 92.564%
17025294111.1

push

github

nickg
Initial support for wide Verilog vectors

72233 of 78030 relevant lines covered (92.57%)

560908.33 hits per line

Source Files on job 17025294111.1
  • Tree
  • List 98
  • Changed 13
  • Source Changed 0
  • Coverage Changed 13
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
  • Back to Build 17025294111
  • 78766281 on github
  • Prev Job for on test (#16931797029.1)
  • Next Job for on test (#17033838891.1)
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2026 Coveralls, Inc