nickg / nvc / 16656920975 / 1
93%
master: 93%

LAST BUILD BRANCH: test
DEFAULT BRANCH: master
Ran
Files 99
Run time 6s
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst
coverage: 92.407% (+0.001%) from 92.406%
16656920975.1

push

github

nickg 
Implement Verilog and-reduction

72177 of 78108 relevant lines covered (92.41%)

551314.1 hits per line

Source Files on job 16656920975.1