nickg / nvc / 16021134934 / 1
93%
master: 93%

LAST BUILD BRANCH: v1.19-branch
DEFAULT BRANCH: master
Ran
Files 98
Run time 5s
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coverage: 92.273% (+0.004%) from 92.269%
16021134934.1

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nickg 
Lower Verilog pre-increment and bit-select in sensitivity list

70690 of 76610 relevant lines covered (92.27%)

562009.36 hits per line

Source Files on job 16021134934.1