nickg / nvc / 10435132666 / 1
92%
master: 92%

LAST BUILD BRANCH: vhpi-nested-record-array
DEFAULT BRANCH: master
Ran
Files 79
Run time 3s
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coverage: 92.007% (-0.01%) from 92.021%
10435132666.1

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nickg 
Code generation for Verilog primitive gates

58892 of 64008 relevant lines covered (92.01%)

658750.4 hits per line

Source Files on job 10435132666.1