• Home
  • Features
  • Pricing
  • Docs
  • Announcements
  • Sign In

nickg / nvc / 18635955291
93%

Build:
DEFAULT BRANCH: master
Ran 19 Oct 2025 09:02PM UTC
Jobs 1
Files 100
Run time 1min
Badge
Embed ▾
README BADGES
x

If you need to use a raster PNG badge, change the '.svg' to '.png' in the link

Markdown

Textile

RDoc

HTML

Rst

19 Oct 2025 04:10PM UTC coverage: 92.581% (+0.005%) from 92.576%
18635955291

push

github

nickg
Constant fold Verilog binary and/or/xor

51 of 51 new or added lines in 2 files covered. (100.0%)

48 existing lines in 2 files now uncovered.

74754 of 80744 relevant lines covered (92.58%)

455839.4 hits per line

Uncovered Existing Lines

Lines Coverage ∆ File
23
96.2
-0.02% src/vlog/vlog-parse.c
25
94.91
0.04% src/elab.c
Jobs
ID Job ID Ran Files Coverage
1 18635955291.1 19 Oct 2025 09:02PM UTC 100
92.58
GitHub Action Run
Source Files on build 18635955291
  • Tree
  • List 100
  • Changed 4
  • Source Changed 0
  • Coverage Changed 4
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
  • Back to Repo
  • 9d3eb75d on github
  • Prev Build on master (#18629953402)
  • Next Build on master (#18663024254)
STATUS · Troubleshooting · Open an Issue · Sales · Support · CAREERS · ENTERPRISE · START FREE · SCHEDULE DEMO
ANNOUNCEMENTS · TWITTER · TOS & SLA · Supported CI Services · What's a CI service? · Automated Testing

© 2026 Coveralls, Inc