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nickg / nvc / 17107590466
93%

Build:
DEFAULT BRANCH: master
Ran 20 Aug 2025 07:06PM UTC
Jobs 1
Files 98
Run time 1min
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20 Aug 2025 06:33PM UTC coverage: 92.57% (-0.002%) from 92.572%
17107590466

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github

nickg
Handle more Verilog unary reduction operators

32 of 35 new or added lines in 4 files covered. (91.43%)

1 existing line in 1 file now uncovered.

72358 of 78166 relevant lines covered (92.57%)

563976.34 hits per line

New Missed Lines in Diff

Lines Coverage ∆ File
1
97.29
0.0% src/jit/jit-irgen.c
1
96.09
-0.05% src/vlog/vlog-lower.c
1
96.25
-0.03% src/vlog/vlog-parse.c

Uncovered Existing Lines

Lines Coverage ∆ File
1
88.95
-0.14% src/jit/jit-interp.c
Jobs
ID Job ID Ran Files Coverage
1 17107590466.1 20 Aug 2025 07:06PM UTC 98
92.57
GitHub Action Run
Source Files on build 17107590466
  • Tree
  • List 98
  • Changed 6
  • Source Changed 0
  • Coverage Changed 6
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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