phanrahan / magma / 2176
74%
master: 75%

LAST BUILD BRANCH: hwtypes2
DEFAULT BRANCH: master
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Jobs 3
Files 192
Run time 17min
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2176

Pull #462

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Revert "Switch to mainline pyverilog"

This reverts commit 5d3125fb0.

This commit adds back requirements.txt so we can point to our forked
version of pyverilog.
Pull Request #462: Parse n-d array types in verilog ports

15 of 15 new or added lines in 1 file covered. (100.0%)

13227 of 17739 relevant lines covered (74.56%)

0.75 hits per line

Jobs
ID Job ID Ran Files Coverage
1 2176.1 0
74.56
 Travis Job 2176.1
2 2176.2 0
Travis Job 2176.2
3 2176.3 0
Travis Job 2176.3
Source Files on build 2176
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