Nic30 / hdlConvertorAst / 75 / 2
56%
master: 56%

DEFAULT BRANCH: master
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Files 73
Run time 14s
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coverage: 60.316% (-0.8%) from 61.1%
DO_DELPLOY=1 CODE_COVERAGE=1

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travis-ci

Nic30 
verilog_to_hwt propopulate_verilog_builtins

2555 of 4236 relevant lines covered (60.32%)

0.6 hits per line

Source Files on job 75.2 (DO_DELPLOY=1 CODE_COVERAGE=1)