Nic30 / hdlConvertorAst / 75
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DEFAULT BRANCH: master
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Jobs 1
Files 73
Run time 15s
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Nic30 
verilog_to_hwt propopulate_verilog_builtins

2555 of 4236 relevant lines covered (60.32%)

0.6 hits per line

Jobs
ID Job ID Ran Files Coverage
2 75.2 (DO_DELPLOY=1 CODE_COVERAGE=1) 0
60.32
 Travis Job 75.2
Source Files on build 75
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