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SystemRDL / PeakRDL-regblock-vhdl / 17831916847 / 1
92%
main: 92%

Build:
DEFAULT BRANCH: main
Ran 18 Sep 2025 02:30PM UTC
Files 45
Run time 4s
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18 Sep 2025 02:24PM UTC coverage: 92.137% (-0.004%) from 92.141%
17831916847.1

push

github

darsor
Merge upstream/v1.1.1 into VHDL port

796 of 926 branches covered (85.96%)

Branch coverage included in aggregate %.

2942 of 3131 relevant lines covered (93.96%)

5.64 hits per line

Source Files on job 17831916847.1
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  • List 45
  • Changed 1
  • Source Changed 0
  • Coverage Changed 1
Coverage ∆ File Lines Relevant Covered Missed Hits/Line Branch Hits Branch Misses
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