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nickg / nvc / 16717403885 / 1
93%
master: 93%

Build:
Build:
LAST BUILD BRANCH: test
DEFAULT BRANCH: master
Ran 04 Aug 2025 08:09AM UTC
Files 98
Run time 820min
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04 Aug 2025 07:57AM UTC coverage: 92.56% (+0.001%) from 92.559%
16717403885.1

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github

nickg
Parse Verilog signed numbers

71746 of 77513 relevant lines covered (92.56%)

557842.77 hits per line

Source Files on job 16717403885.1
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  • List 98
  • Changed 2
  • Source Changed 0
  • Coverage Changed 2
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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