nickg / nvc / 13798039459 / 1
93%
master: 93%

LAST BUILD BRANCH: random-initialization
DEFAULT BRANCH: master
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Files 91
Run time 6s
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coverage: 92.333% (+0.01%) from 92.319%
13798039459.1

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nickg 
Implement __FILE__ and __LINE__ in Verilog preprocessor

68139 of 73797 relevant lines covered (92.33%)

433718.21 hits per line

Source Files on job 13798039459.1