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Ran 28 Apr 2024 05:16PM UTC

Files 18

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Committed 28 Apr 2024 05:16PM UTC coverage: 80.135% (+0.2%) from 79.965%

Job # 8869177395.1

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push

github

Committed by

web-flow

Commit Message

refactor: better handling of RISC-V registers (#33)

It turns out that RISC-V registers are much more complicated than the initial design was prepared for. Re-think how to describe all the registers in a DSL.

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476 of 594 relevant lines covered (80.13%)

6.88 hits per line

perf-toolbox / tir / 8869177395 / 1
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perf-toolbox / tir / 8869177395 / 1 88% main: 88%

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perf-toolbox / tir / 8869177395 / 1
88%
main: 88%

README BADGES
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