nickg / nvc / 8030177309 / 1
93%
master: 93%

LAST BUILD BRANCH: test
DEFAULT BRANCH: master
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Files 78
Run time 2s
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coverage: 91.653% (-0.01%) from 91.666%
8030177309.1

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nickg 
Add support for Verilog supply net type

52104 of 56849 relevant lines covered (91.65%)

664363.36 hits per line

Source Files on job 8030177309.1