1
93%
master: 93%

Ran 31 May 2023 08:11AM UTC

Files 64

Run time 1s

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Committed 31 May 2023 07:35AM UTC coverage: 90.636% (-0.009%) from 90.645%

Build Type

push

github

Committed by

Commit Message

Rework representation of VHDL-2008 element constraints

Run Details

43045 of 47492 relevant lines covered (90.64%)

921377.54 hits per line