cfelton / rhea / 457
70%
master: 57%

LAST BUILD BRANCH: clock_mgmt
DEFAULT BRANCH: master
Ran
Jobs 2
Files 350
Run time 1min
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457

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Christopher Felton 
Remove phantom warnings in verilog conversion related to Xilinx device_clock_mgmt_prim (#54)

* Remove phantom warnings related to Xilinx device_clock_mgmt_prim

* Also removed phantom conversion warning about clockin not being read

9392 of 13348 relevant lines covered (70.36%)

0.7 hits per line

Jobs
ID Job ID Ran Files Coverage
2 457.2 175
70.35
 Travis Job 457.2
3 457.3 175
70.38
 Travis Job 457.3
Source Files on build 457
Coverage ∆ File Lines Relevant Covered Missed Hits/Line