nickg / nvc / 32343887692
92%
master: 92%

LAST BUILD BRANCH: issue-1248
DEFAULT BRANCH: master
Ran
Jobs 1
Files 103
Run time 1min
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Rst
coverage: 92.4% (+0.001%) from 92.399%
32343887692

push

github

nickg 
Implement System Verilog sized casts

71 of 77 new or added lines in 5 files covered. (92.21%)

1 existing line in 1 file now uncovered.

80777 of 87421 relevant lines covered (92.4%)

687743.01 hits per line

Uncovered Changes

Lines Coverage ∆ File
4
95.82
 -0.02% src/vlog/vlog-parse.c
2
87.34
 0.09% src/vlog/vlog-util.c

Coverage Regressions

Lines Coverage ∆ File
1
95.4
 0.01% src/vlog/vlog-lower.c
Jobs
ID Job ID Ran Files Coverage
1 32343887692.1 103
92.4
 GitHub Action Run
Source Files on build 32343887692