Qiskit / qiskit-fermions / 30439919391

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fix: make native operators and their circuits picklable (#228)

FermionicCircuit/FermionicDAGCircuit instances holding an Evolution gate
failed to pickle. Two independent causes:

1. FermionOperator, MajoranaOperator, EdgeVertexOperator, and
   TransferVertexOperator carried no pickle protocol, so pickle fell back to
   __reduce_ex__'s default handling and lost the `groups` field entirely.
   Each now implements __getnewargs__/__getstate__/__setstate__ to round-trip
   through their constructor plus `groups`.

2. Fixing (1) surfaced a second, independent bug: these classes (and
   FciLinearOperator, FCIDump) declare a public, logical `__module__` via
   `#[pyclass(module = "...")]` for user-facing repr()/error messages (per
   #186), but that path is never registered in sys.modules -- only the
   physical `_lib`-rooted path is. Pickle needs to resolve a class's
   `__module__` via importlib to serialize a reference to it, so this broke
   regardless of (1). qiskit_fermions/__init__.py's existing sys.modules
   registration loop now also aliases each pyclass's declared module to its
   real module object, leaving the public-facing repr()/__module__/error
   text untouched.

Adds pickle round-trip tests for all four operator types (with and without
`groups`), for a FermionicCircuit/FermionicDAGCircuit wrapping an Evolution
gate, and for RelabelModes' pyomo SolverResults metadata as requested by the
issue (that metadata was not actually the root cause, but is now guarded
against regressing).

Closes #225

Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>

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