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perf(mining): per-board hot-loop data placement via Kconfig (#441)

PR#435/TA-392 pinned block2 + hw_ctx to cache-line-aligned BSS statics to
protect the hot loop from layout-induced regressions. that was measured
under the OLD broken early-reject filter, where ~40-65% of nonces took the
expensive digest-readback path and the per-nonce working set was large and
layout-sensitive.

post-TA-396 (filter fixed), esp32-wroom32/D0 takes the cheap reject path on
virtually every nonce; its working set is tiny and the aligned-static
placement measures ~1.5% SLOWER than stack (445 -> 453 kH/s, reproduced).
esp32-S3/AHB has a larger per-nonce set (midstate_hw[8] + block2_words) and
still benefits from pinning (within noise either way, kept on the safe
default).

introduce CONFIG_MINING_PIN_HOTLOOP_DATA (default y = pinned) and gate the
placement on it; esp32-wroom32 sets it =n. this establishes the maintainable
per-board tuning pattern: one semantic Kconfig flag, per-board default in
sdkconfig, no chip-ID checks in hot code. validated: wroom32 453 kH/s (+1.7%),
tdongle 307-309 kH/s unchanged, both 100% pool acceptance.

Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>

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