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nickg / nvc / 26533822565
92%
master: 92%

Build:
Build:
LAST BUILD BRANCH: macrodef
DEFAULT BRANCH: master
Ran 27 May 2026 07:42PM UTC
Jobs 1
Files 104
Run time 1min
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27 May 2026 07:29PM UTC coverage: 92.267%. Remained the same
26533822565

Pull #1513

github

web-flow
Merge 0e23a5f7c into 97397e72d
Pull Request #1513: Verilog: Support default values on macro functions

6 of 6 new or added lines in 1 file covered. (100.0%)

78956 of 85573 relevant lines covered (92.27%)

641825.01 hits per line

Jobs
ID Job ID Ran Files Coverage
1 26533822565.1 27 May 2026 07:42PM UTC 104
92.27
GitHub Action Run
Source Files on build 26533822565
  • Tree
  • List 104
  • Changed 1
  • Source Changed 0
  • Coverage Changed 1
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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  • Pull Request #1513
  • PR Base - master (#26470279797)
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