24158346884
92%

Ran 08 Apr 2026 09:09PM UTC

Jobs 1

Files 101

Run time 1min

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Committed 08 Apr 2026 08:57PM UTC coverage: 92.381%. Remained the same

Build # 24158346884

Build Type

push

github

Committed by

web-flow

Commit Message

Verilog: fix macro expansion breaking tokens in precise mode (#1485)

When the preprocessor runs in precise mode (during analysis), it
inserts `__nvc_push/`__nvc_pop location tracking directives around
each macro expansion.  These directives were always preceded by a
newline, which broke tokens that span a macro boundary.

For example, 32'd`MACRO (a sized decimal literal where the value
comes from a macro) would produce:

  32'd
  `__nvc_push ...
  0
  `__nvc_pop

The newline between 32'd and 0 broke the number literal, causing
"unexpected '" parse errors.

Fix: only emit the location tracking directives when the macro
expansion starts at a token boundary (preceded by whitespace or
at the beginning of the output).  When the macro is expanding
in the middle of a token, skip the directives so the token stays
intact.  Error locations for mid-token macros will point to the
enclosing expression rather than the macro itself, which is an
acceptable tradeoff.

Co-authored-by: Rafał Hibner <rafal.hibner@secom.com.pl>

Coverage Stats

76272 of 82562 relevant lines covered (92.38%)

612438.8 hits per line

Jobs

ID	Job ID	Ran	Files	Coverage
1	24158346884.1	08 Apr 2026 09:09PM UTC	101	92.38	GitHub Action Run

nickg / nvc / 24158346884
92%

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