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nickg / nvc / 23713435182
92%

Build:
DEFAULT BRANCH: master
Ran 29 Mar 2026 04:31PM UTC
Jobs 1
Files 101
Run time 1min
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29 Mar 2026 04:18PM UTC coverage: 92.371% (+0.008%) from 92.363%
23713435182

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nickg
Fix lowering of Verilog event control in timing statement

Fixes #1466

30 of 30 new or added lines in 1 file covered. (100.0%)

76748 of 83087 relevant lines covered (92.37%)

607435.63 hits per line

Jobs
ID Job ID Ran Files Coverage
1 23713435182.1 29 Mar 2026 04:31PM UTC 101
92.37
GitHub Action Run
Source Files on build 23713435182
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  • List 101
  • Changed 2
  • Source Changed 0
  • Coverage Changed 2
Coverage ∆ File Lines Relevant Covered Missed Hits/Line
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