456
57%

Ran 16 Aug 2016 11:20AM UTC

Jobs 3

Files 525

Run time 1min

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Build # 456

Build Type

push

travis-ci

Committed by

cfelton

Commit Message

Remove phantom warnings in verilog conversion related to Xilinx device_clock_mgmt_prim (#54)

* Remove phantom warnings related to Xilinx device_clock_mgmt_prim

* Also removed phantom conversion warning about clockin not being read

Run Details

14087 of 20022 relevant lines covered (70.36%)

0.7 hits per line

Uncovered Existing Lines

Lines	Coverage	File
24	100.0	/home/travis/virtualenv/python2.7.9/lib/python2.7/site-packages/rhea/vendor/xilinx/device_clock_mgmt.py
24	100.0	/home/travis/virtualenv/python3.5.2/lib/python3.5/site-packages/rhea/vendor/xilinx/device_clock_mgmt.py
24	100.0	/home/travis/virtualenv/python3.4.2/lib/python3.4/site-packages/rhea/vendor/xilinx/device_clock_mgmt.py

Jobs

ID	Job ID	Ran	Coverage
1	456.1	16 Aug 2016 11:21AM UTC	70.35	Travis Job 456.1
2	456.2	16 Aug 2016 11:20AM UTC	70.35	Travis Job 456.2
3	456.3	16 Aug 2016 11:21AM UTC	70.38	Travis Job 456.3

Source Files on build 456

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cfelton / rhea / 456
57%

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cfelton / rhea / 456 57%

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Markdown

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Rst

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Source Files on build 456

cfelton / rhea / 456
57%

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