Qiskit / qiskit / 15687749088

88%

main: 88%

Build Type

Pull #14624

github

Committed by mergify[bot]

Commit Message

Fix classical bit mapping in HLS pass (#14597)

* Map classical bits from block to outer circuit

Co-authored-by: Alexander Ivrii <alexi@il.ibm.com>

* Add regression test

* Add reno

* Avoid allocating cargs

Previously the cargs were being written to a Vec<usize> as an
intermediate storage, however we are just returning them directly and
don't need to allocate or change the types. This commit just works with
the slice returned from the interner directly which both simplifies the
code and should also be faster.

---------

Co-authored-by: Alexander Ivrii <alexi@il.ibm.com>
Co-authored-by: Matthew Treinish <mtreinish@kortar.org>
(cherry picked from commit 9ec464af4)

Pull Request Pull Request #14624: Fix classical bit mapping in HLS pass (backport #14597)

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